B N, E C, K V, T N, Sree B B, Sree M J, et al. Design and analysis of PTL based reversible logic encoder circuits for low-power applications. ijet [Internet]. 2026 Jun. 2 [cited 2026 Aug. 20];72(2). Available from: https://wydawnictwo.pan.pl/index.php/ijet/article/view/1126